This section is intended to provide information relevant to understanding various technologies described herein. As the section's title implies, this is a discussion of related art that should in no way imply that it is prior art. Generally, related art may or may not be considered prior art. It should therefore be understood that any statement in this section should be read in this light, and not as any admission of prior art.
In reference to integrated circuitry, dynamic random access memory (DRAM) refers to a type of memory that stores a data value in a capacitor that is accessible via a transistor. The charged or discharged state of the capacitor is used to represent the data value of a bit (i.e., 0 and 1). Since transistors typically leak a small amount of charge or voltage over time, the capacitor may slowly discharge, and as such, the stored data value fades unless capacitor charge is refreshed periodically. Due to refresh, DRAM is referred to as dynamic memory as opposed to static memory, and DRAM is referred to as a volatile type of memory because it can lose its data value when power is withdrawn.
In conventional computer systems, DRAM is typically a large power consumer. In some cases, to reduce power consumption during an idle state, the memory bus clock and unused circuitry may be disabled in self-refresh mode to reduce unnecessary power consumption. However, since DRAM cells are periodically refreshed to keep their data in self-refresh mode, power consumption still exists due to internal refresh operations.